Product

The next generation NVMe SDD Controller STAR1000P with even higher performance and lower power consumption will be delivered to market in 2019.

STAR1000P NVMe SSD Controller
STAR1000P is our second generation SSD controller. It supports PCIe Gen3x4, NVMe 1.3 and 8 flash channels, supporting up to 32TB capability. It provides excellent performance, reaching 3.5GB/s and 3GB/s for sequential read and write, and at least 600K IOPS for both random read and write. The write latency can be optimized up-to 10us. The third generation 4K LDPC technology is introduced in STAR1000P, enabling stronger error correction capability that can easily handle latest 3D TLC and QLC. With DVFS and finer dynamic clock gating technology, STAR1000P reduces power consumption to only 2W in full performance running mode. Regarding to enterprise features, STAR1000P enhances various error protection technologies, including PI, EEEC and in-line ECC, meeting the high demand for stability in enterprise application.
  • High Performance

    +

    Random read up to 600K IOPS
    Random write up to 600K IOPS
    Sequential read up to 3.5GB/s
    Sequential write up to 3GB/s
    Read latency 75us
    Write latency 15us
    
  • Software Defined Architecture

    +

    Latest NVMe protocol can be supported by firmware update
    New Nand flash can be supported by microcode update
    
  • Powerful Multi-core CPUs

    +

    SMP architecture
    64GB address data space access
    
  • Power Consumption

    +

    Active < 2.5W
    L1. 2 < 2mW
    

Product Performance

It supports PCIe Gen3x4, NVMe 1.3 and all on-shelf NAND flash (3D MLC, TLC, QLC) with StarLDPC® ECC engine.

  • Host Interface

    :

    Supports NVMe 1.3

    PCIe Gen1 Gen2 Gen3

    Supports up to x4 single endpoint mode (x1,x2,x4)

    Supports single root I/O virtualization (SR-IOV)up to 16 VFs

    Supports L1 active state power management(ASPM)L1 substates (L1SS)

    Supports message signaled interrupt (MSI and MSI-X)


  • DRAM Interface

    :

    Supports JEDEC DDR3/DDR3L/DDR4/LPDDR3

    32-bit DRAM Interface with in-line ECC

    Supports up to 2 ranks


  • Data Protection and Error Handling

    :

    TCG-opal 2.0 compliant

    Hardware TRNG and SHA256

    Secure boot

    Supports XTS-AES256

    Supports RAID5/RAID6

    Supports SM2/SM3/SM4

    SECDED for all on-chip RAMs

    Full path data protection

    High performance XOR engine


  • NAND Flash Interface

    :

    Supports 8 channels with up to 16 LUNs for each channel

    Supports 1.2V/1.8V flash I/O ONFI 4.0/Toggle 3.0, up to 800MT/s

    Microcode architecture, flexibly supports 2D/3D SLC, MLC, TLC and QLC

    Supports 1-plane, 2-plane, and 4


  • StarLDPC

    StarLDPC

    StarLDPC:

    Adaptive code rate from 0.65~0.94

    Up to four check matrix

    Supports 4 soft bits


  • Architecture

    :

    Multi-core in SMP

    On-Chip temperature sensor

    JTAG/SMBUS debug interface

    Supports NVMe management interface


  • Delivery

    :

    Turn-key solution including ASIC/SDK/FW,

    development tools and evaluation board


  • Block Diagram

    :


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